Live Webinar May 13: An introduction to efficient VHDL verification – using the open source UVVM

This presentation by Espen Tallaksen will show you the basics of making good testbenches, give you a fast introduction to UVVM Utility Library, and show you step-by-step how to get started in only 4 minutes. Entry level UVVM is really dead simple, and this will show you how and why.